Citation
Armin Wasicek. "The ACROSS MPSoC: A New Generation of Multi-Core Processors Designed for Safety-Critical Embedded Systems". Talk or presentation, 24, September, 2013.

Abstract
The ACROSS MPSoC represent the latest milestone in a research line to develop a dependable Multi-Core Processor platform that can host mixed-criticality applications with hard-real time constraints. The technical key innovation is a time-triggered Network-on-a-Chip (TTNoC), which provides temporal determinism and temporal and spatial partitioning. The ACROSS MPSoC supports applications up to the highest criticality classes, and facilitates efficient mixed-criticality integration and certification. In this talk, we will present the guiding design principles of the TTNoC that are inherited from the Time-Triggered Architecture (TTA). Next, we will show how these core concepts solve some of the issues that current multi-core architectures suffer in the real-time domain.

Electronic downloads

• wasicek-ttsoc_pres-ucb.pdf · application/pdf · 9624 kbytes

• HTML

  Armin Wasicek. <a
  href="http://chess.eecs.berkeley.edu/pubs/1018.html"
  ><i>The ACROSS MPSoC: A New Generation of
  Multi-Core Processors Designed for Safety-Critical Embedded
  Systems</i></a>, Talk or presentation,  24,
  September, 2013.

• Plain text

  Armin Wasicek. "The ACROSS MPSoC: A New Generation of
  Multi-Core Processors Designed for Safety-Critical Embedded
  Systems". Talk or presentation,  24, September, 2013.

• BibTeX

  @presentation{Wasicek13_ACROSSMPSoCNewGenerationOfMultiCoreProcessorsDesigned,
      author = {Armin Wasicek},
      title = {The ACROSS MPSoC: A New Generation of Multi-Core
                Processors Designed for Safety-Critical Embedded
                Systems},
      day = {24},
      month = {September},
      year = {2013},
      abstract = {The ACROSS MPSoC represent the latest milestone in
                a research line to develop a dependable Multi-Core
                Processor platform that can host mixed-criticality
                applications with hard-real time constraints. The
                technical key innovation is a time-triggered
                Network-on-a-Chip (TTNoC), which provides temporal
                determinism and temporal and spatial partitioning.
                The ACROSS MPSoC supports applications up to the
                highest criticality classes, and facilitates
                efficient mixed-criticality integration and
                certification. In this talk, we will present the
                guiding design principles of the TTNoC that are
                inherited from the Time-Triggered Architecture
                (TTA). Next, we will show how these core concepts
                solve some of the issues that current multi-core
                architectures suffer in the real-time domain.},
      URL = {http://chess.eecs.berkeley.edu/pubs/1018.html}
  }
  

Posted by Armin Wasicek on 24 Sep 2013.
Groups: chessworkshop
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