Citation
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto Sangiovanni-Vincentelli, Yosinori Watanabe. "Simulation Based Deadlock Analysis for System Level Designs". 42nd Annual Design Automation Conference, 260-265, June, 2005.

Abstract
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the synchronization dependencies in concurrent systems modeled in the Metropolis design environment, where system functions, high level architectures and function-architecture mappings can be modeled and simulated. We propose a data structure called the dynamic synchronization dependency graph, which captures the runtime (blocking) dependencies. A loop-detection algorithm is then used to detect deadlocks and help designers quickly isolate and identify modeling errors that cause the deadlock problems. We demonstrate our approach through a real world design example, which is a complex functional model for video processing and a high level model of function-architecture mapping.

Electronic downloads

• http://portal.acm.org/citation.cfm?id=1065579.1065647

• HTML

  Xi Chen, Abhijit Davare, Harry Hsieh, Alberto
  Sangiovanni-Vincentelli, Yosinori Watanabe. <a
  href="http://chess.eecs.berkeley.edu/pubs/110.html"
  >Simulation Based Deadlock Analysis for System Level
  Designs</a>, 42nd Annual Design Automation Conference,
  260-265, June, 2005.

• Plain text

  Xi Chen, Abhijit Davare, Harry Hsieh, Alberto
  Sangiovanni-Vincentelli, Yosinori Watanabe. "Simulation
  Based Deadlock Analysis for System Level Designs". 42nd
  Annual Design Automation Conference, 260-265, June, 2005.

• BibTeX

  @inproceedings{ChenDavareHsiehSangiovanniVincentelliWatanabe05_SimulationBasedDeadlockAnalysisForSystemLevelDesigns,
      author = {Xi Chen and Abhijit Davare and Harry Hsieh and
                Alberto Sangiovanni-Vincentelli and Yosinori
                Watanabe},
      title = {Simulation Based Deadlock Analysis for System
                Level Designs},
      booktitle = {42nd Annual Design Automation Conference},
      pages = {260-265},
      month = {June},
      year = {2005},
      abstract = {In the design of highly complex, heterogeneous,
                and concurrent systems, deadlock detection and
                resolution remains an important issue. In this
                paper, we systematically analyze the
                synchronization dependencies in concurrent systems
                modeled in the Metropolis design environment,
                where system functions, high level architectures
                and function-architecture mappings can be modeled
                and simulated. We propose a data structure called
                the dynamic synchronization dependency graph,
                which captures the runtime (blocking)
                dependencies. A loop-detection algorithm is then
                used to detect deadlocks and help designers
                quickly isolate and identify modeling errors that
                cause the deadlock problems. We demonstrate our
                approach through a real world design example,
                which is a complex functional model for video
                processing and a high level model of
                function-architecture mapping.},
      URL = {http://chess.eecs.berkeley.edu/pubs/110.html}
  }
  

Posted by Abhijit Davare on 15 May 2006.
Groups: chess chesslocal
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