Citation
Hugo Andrade, Patricia Derler, John Eidson, Ya-Shian Li-Baboud, Aviral Shrivastava, Kevin Stanton, Marc Weiss. "Towards a Reconfigurable Distributed Testbed to Enable Advanced Research and Development of Timing and Synchronization in Cyber‐Physical Systems". 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 7, December, 2015.

Abstract
Timing and synchronization play a key role in cyber-physical systems (CPS). Precise timing, as often required in safety-critical CPS, depends on hardware support for enforcement of periodic measure, compute, and actuate cycles. For general CPS, designers use a combination of application specific integrated circuits (ASICs) or field programmable gate arrays (FPGAs) and conventional microprocessors. Microprocessors as well as commonly used computer languages and operating systems are essentially devoid of any explicit support for precise timing and synchronization. Modern computer science and microprocessor design has effectively removed time from the abstractions used by designers with the result that time is regarded as a performance metric rather than a correctness specification or criterion. There are interesting proposals and avenues of research to correct this situation, but the barrier is quite high for conducting proof of concept studies or collaborative research and development. This paper proposes a conceptual design and use model for a reconfigurable testbed designed specifically to support exploratory research, proof of concept, and collaborative work to introduce explicit support for time and synchronization in microprocessors, reconfigurable fabrics, language and design system architecture for time-sensitive CPS. Reconfigurable computing is used throughout the system in several roles: as part of the prototyping platform infrastructure, the measurement and control system, and the application system under test.

Electronic downloads

• https://doi.org/10.1109/ReConFig.2015.7393352

• HTML

  Hugo Andrade, Patricia Derler, John Eidson, Ya-Shian
  Li-Baboud, Aviral Shrivastava, Kevin Stanton, Marc Weiss.
  <a
  href="http://chess.eecs.berkeley.edu/pubs/1189.html"
  >Towards a Reconfigurable Distributed Testbed to Enable
  Advanced Research and Development of Timing and
  Synchronization in Cyber�Physical Systems</a>,
  2015 International Conference on ReConFigurable Computing
  and FPGAs (ReConFig), IEEE, 7, December, 2015.

• Plain text

  Hugo Andrade, Patricia Derler, John Eidson, Ya-Shian
  Li-Baboud, Aviral Shrivastava, Kevin Stanton, Marc Weiss.
  "Towards a Reconfigurable Distributed Testbed to Enable
  Advanced Research and Development of Timing and
  Synchronization in Cyber�Physical Systems".
  2015 International Conference on ReConFigurable Computing
  and FPGAs (ReConFig), IEEE, 7, December, 2015.

• BibTeX

  @inproceedings{AndradeDerlerEidsonLiBaboudShrivastavaStantonWeiss15_TowardsReconfigurableDistributedTestbedToEnableAdvanced,
      author = {Hugo Andrade and Patricia Derler and John Eidson
                and Ya-Shian Li-Baboud and Aviral Shrivastava and
                Kevin Stanton and Marc Weiss},
      title = {Towards a Reconfigurable Distributed Testbed to
                Enable Advanced Research and Development of Timing
                and Synchronization in Cyber�Physical Systems},
      booktitle = {2015 International Conference on ReConFigurable
                Computing and FPGAs (ReConFig)},
      organization = {IEEE},
      day = {7},
      month = {December},
      year = {2015},
      abstract = {Timing and synchronization play a key role in
                cyber-physical systems (CPS). Precise timing, as
                often required in safety-critical CPS, depends on
                hardware support for enforcement of periodic
                measure, compute, and actuate cycles. For general
                CPS, designers use a combination of application
                specific integrated circuits (ASICs) or field
                programmable gate arrays (FPGAs) and conventional
                microprocessors. Microprocessors as well as
                commonly used computer languages and operating
                systems are essentially devoid of any explicit
                support for precise timing and synchronization.
                Modern computer science and microprocessor design
                has effectively removed time from the abstractions
                used by designers with the result that time is
                regarded as a performance metric rather than a
                correctness specification or criterion. There are
                interesting proposals and avenues of research to
                correct this situation, but the barrier is quite
                high for conducting proof of concept studies or
                collaborative research and development. This paper
                proposes a conceptual design and use model for a
                reconfigurable testbed designed specifically to
                support exploratory research, proof of concept,
                and collaborative work to introduce explicit
                support for time and synchronization in
                microprocessors, reconfigurable fabrics, language
                and design system architecture for time-sensitive
                CPS. Reconfigurable computing is used throughout
                the system in several roles: as part of the
                prototyping platform infrastructure, the
                measurement and control system, and the
                application system under test.},
      URL = {http://chess.eecs.berkeley.edu/pubs/1189.html}
  }
  

Posted by Mary Stewart on 18 Apr 2017.
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