Citation
Guang Yang, Xi Chen, Felice Balarin, Harry Hsieh, Alberto Sangiovanni-Vincentelli. "Communication and Co-Simulation Infrastructure for Heterogeneous System Integration". Design Automation and Test in Europe, March, 2006.

Abstract
With the increasing complexity and heterogeneity of embedded electronic systems, a unified design methodology at higher levels of abstraction becomes a necessity. Meanwhile, it is also important to incorporate the current design practice emphasizing IP reuse at various abstraction levels. In the traditional design industry, there are many legacy IPs at the register transfer level or gate level. To handle the design complexity, people are now moving towards higher abstraction levels, such as the transaction level or behavior level. However, the abstraction gap prohibits easy communication and synchronization in IP integration. Another challenge is the co-simulation among IPs written in different design languages. Up to now, there are attempts on co-simulation between HDLs and C/C++/SystemC; however, there does not exist a generic co-simulation framework for arbitrary design languages. In this paper, we present a communication infrastructure for an integrated design framework that enables co-design and co-simulation of heterogeneous design components specified at different abstraction levels and in different languages. The core of the approach is to abstract different communication interfaces or protocols to a common high level communication semantics. Designers only need to specify the interfaces of the design components using extended regular expressions; communication adapters can then be automatically generated for the co-simulation or other co-design and co-verification purposes.

Electronic downloads

• date06.pdf · application/pdf · 116 kbytes

• HTML

  Guang Yang, Xi Chen, Felice Balarin, Harry Hsieh, Alberto
  Sangiovanni-Vincentelli. <a
  href="http://chess.eecs.berkeley.edu/pubs/134.html"
  >Communication and Co-Simulation Infrastructure for
  Heterogeneous System Integration</a>, Design
  Automation and Test in Europe, March, 2006.

• Plain text

  Guang Yang, Xi Chen, Felice Balarin, Harry Hsieh, Alberto
  Sangiovanni-Vincentelli. "Communication and
  Co-Simulation Infrastructure for Heterogeneous System
  Integration". Design Automation and Test in Europe,
  March, 2006.

• BibTeX

  @inproceedings{YangChenBalarinHsiehSangiovanniVincentelli06_CommunicationCoSimulationInfrastructureForHeterogeneous,
      author = {Guang Yang and Xi Chen and Felice Balarin and
                Harry Hsieh and Alberto Sangiovanni-Vincentelli},
      title = {Communication and Co-Simulation Infrastructure for
                Heterogeneous System Integration},
      booktitle = {Design Automation and Test in Europe},
      month = {March},
      year = {2006},
      abstract = {With the increasing complexity and heterogeneity
                of embedded electronic systems, a unified design
                methodology at higher levels of abstraction
                becomes a necessity. Meanwhile, it is also
                important to incorporate the current design
                practice emphasizing IP reuse at various
                abstraction levels. In the traditional design
                industry, there are many legacy IPs at the
                register transfer level or gate level. To handle
                the design complexity, people are now moving
                towards higher abstraction levels, such as the
                transaction level or behavior level. However, the
                abstraction gap prohibits easy communication and
                synchronization in IP integration. Another
                challenge is the co-simulation among IPs written
                in different design languages. Up to now, there
                are attempts on co-simulation between HDLs and
                C/C++/SystemC; however, there does not exist a
                generic co-simulation framework for arbitrary
                design languages. In this paper, we present a
                communication infrastructure for an integrated
                design framework that enables co-design and
                co-simulation of heterogeneous design components
                specified at different abstraction levels and in
                different languages. The core of the approach is
                to abstract different communication interfaces or
                protocols to a common high level communication
                semantics. Designers only need to specify the
                interfaces of the design components using extended
                regular expressions; communication adapters can
                then be automatically generated for the
                co-simulation or other co-design and
                co-verification purposes. },
      URL = {http://chess.eecs.berkeley.edu/pubs/134.html}
  }
  

Posted by Guang Yang on 16 May 2006.
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