Citation
Stephen A. Edwards, Edward A. Lee. "Precision-Timed (PRET) Machines". Talk or presentation, 5, June, 2007; Presented at the 44th Design Automation Conference, San Diego, California.

Abstract
We argue that at least for embedded software applications, computer architecture, software, and networking have gone too far down the path of emphasizing average case performance over timing predictability. In architecture, techniques such as multi-level caches and deep pipelines with dynamic dispatch and speculative execution make worst-case execution times (WCET) highly dependent on both implementation details of the processor and on the context in which the software is executed. Yet virtually all real-time programming methodologies depend on WCET. When timing properties are important in the software and when concurrent execution is affected by timing, the result is brittle designs. In this paper, we argue for precision timed (PRET) machines, which deliver high performance, but not at the expense of timing predictability.

Electronic downloads

• http://www1.cs.columbia.edu/~sedwards/presentations/2007-dac-pret.pdf

• HTML

  Stephen A. Edwards, Edward A. Lee. <a
  href="http://chess.eecs.berkeley.edu/pubs/334.html"><i>Precision-Timed
  (PRET) Machines</i></a>, Talk or presentation, 
  5, June, 2007; Presented at the 44th <a
  href="http://www.dac.com/" >Design Automation
  Conference</a>, San Diego, California.

• Plain text

  Stephen A. Edwards, Edward A. Lee. "Precision-Timed
  (PRET) Machines". Talk or presentation,  5, June, 2007;
  Presented at the 44th <a
  href="http://www.dac.com/" >Design Automation
  Conference</a>, San Diego, California.

• BibTeX

  @presentation{EdwardsLee07_PrecisionTimedPRETMachines,
      author = {Stephen A. Edwards and Edward A. Lee},
      title = {Precision-Timed (PRET) Machines},
      day = {5},
      month = {June},
      year = {2007},
      note = {Presented at the 44th <a
                href="http://www.dac.com/" >Design Automation
                Conference</a>, San Diego, California},
      abstract = {We argue that at least for embedded software
                applications, computer architecture, software, and
                networking have gone too far down the path of
                emphasizing average case performance over timing
                predictability. In architecture, techniques such
                as multi-level caches and deep pipelines with
                dynamic dispatch and speculative execution make
                worst-case execution times (WCET) highly dependent
                on both implementation details of the processor
                and on the context in which the software is
                executed. Yet virtually all real-time programming
                methodologies depend on WCET. When timing
                properties are important in the software and when
                concurrent execution is affected by timing, the
                result is brittle designs. In this paper, we argue
                for precision timed (PRET) machines, which deliver
                high performance, but not at the expense of timing
                predictability.},
      URL = {http://chess.eecs.berkeley.edu/pubs/334.html}
  }
  

Posted by Christopher Brooks on 12 Jun 2007.
Groups: pret
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