Citation
Stavros Tripakis. "Modular Code Generation from Synchronous Block Diagrams: Modularity vs. Reusability vs. Code Size". Talk or presentation, 3, February, 2009.

Abstract
Synchronous block diagrams (SBDs) are a hierarchical signal-flow diagram notation with synchronous semantics. They are the fundamental model behind widespread tools in the embedded software domain, such as SCADE and the discrete-time subset of Simulink. We study modular code generation from SBDs: modular means that code is generated for a given composite block independently from context (i.e., without knowing in which diagrams this block is to be used). Previous methods fail to address this problem in a satisfactory manner. They often generate "monolithic" code, e.g., a single step-function per block. This introduces false dependencies between the inputs and outputs of the block, and compromises reusability, by not allowing the block to be used in some contexts. As a result, state-of-the-art tools either impose restrictions on the diagrams they can handle or resort to flattening. We propose a framework that fixes this by generating, for a given block, a variable number of interface functions, as many as needed to achieve maximal reusability, but no more. In the worst case, N+1 functions may be needed, where N is the number of outputs of the block. It is crucial to minimize the number of interface functions, for reasons of scalability, but also because of IP concerns. We are thus led to define a quantified notion of modularity, in terms of the size of the interface of a block. The smaller the interface, the more modular the code is. Our framework exposes fundamental trade-offs between reusability, modularity and code size. We show how to explore these trade-offs by choosing appropriate graph clustering algorithms. We present a prototype implementation and experimental results carried on Simulink models. We also describe extensions of our framework to triggered and timed diagrams. This is joint work with Roberto Lublinerman.

Electronic downloads

• chess09-modular.pdf · application/pdf · 702 kbytes

• HTML

  Stavros Tripakis. <a
  href="http://chess.eecs.berkeley.edu/pubs/521.html"
  ><i>Modular Code Generation from Synchronous Block
  Diagrams: Modularity vs. Reusability vs. Code
  Size</i></a>, Talk or presentation,  3,
  February, 2009.

• Plain text

  Stavros Tripakis. "Modular Code Generation from
  Synchronous Block Diagrams: Modularity vs. Reusability vs.
  Code Size". Talk or presentation,  3, February, 2009.

• BibTeX

  @presentation{Tripakis09_ModularCodeGenerationFromSynchronousBlockDiagramsModularity,
      author = {Stavros Tripakis},
      title = {Modular Code Generation from Synchronous Block
                Diagrams: Modularity vs. Reusability vs. Code Size},
      day = {3},
      month = {February},
      year = {2009},
      abstract = {Synchronous block diagrams (SBDs) are a
                hierarchical signal-flow diagram notation with
                synchronous semantics. They are the fundamental
                model behind widespread tools in the embedded
                software domain, such as SCADE and the
                discrete-time subset of Simulink. We study modular
                code generation from SBDs: modular means that code
                is generated for a given composite block
                independently from context (i.e., without knowing
                in which diagrams this block is to be used).
                Previous methods fail to address this problem in a
                satisfactory manner. They often generate
                "monolithic" code, e.g., a single step-function
                per block. This introduces false dependencies
                between the inputs and outputs of the block, and
                compromises reusability, by not allowing the block
                to be used in some contexts. As a result,
                state-of-the-art tools either impose restrictions
                on the diagrams they can handle or resort to
                flattening. We propose a framework that fixes this
                by generating, for a given block, a variable
                number of interface functions, as many as needed
                to achieve maximal reusability, but no more. In
                the worst case, N+1 functions may be needed, where
                N is the number of outputs of the block. It is
                crucial to minimize the number of interface
                functions, for reasons of scalability, but also
                because of IP concerns. We are thus led to define
                a quantified notion of modularity, in terms of the
                size of the interface of a block. The smaller the
                interface, the more modular the code is. Our
                framework exposes fundamental trade-offs between
                reusability, modularity and code size. We show how
                to explore these trade-offs by choosing
                appropriate graph clustering algorithms. We
                present a prototype implementation and
                experimental results carried on Simulink models.
                We also describe extensions of our framework to
                triggered and timed diagrams. This is joint work
                with Roberto Lublinerman. },
      URL = {http://chess.eecs.berkeley.edu/pubs/521.html}
  }
  

Posted by Hiren Patel on 4 Feb 2009.
Groups: chess
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