Citation
Isaac Liu, Ben Lickly, Hiren Patel, Edward A. Lee. "Poster Abstract: Timing Instructions - ISA Extensions for Timing Guarantees". IEEE Real-Time and Embedded Technology and Applications Symposium, April, 2009.

Abstract
We present our on-going efforts to guarantee the timing behavior of a program targeted for the precision timed architecture. We extend both the ISA and the hardware to support a set of timing instructions that allow programmers to control the execution time of a sequence of instructions. Programs written using these timing instructions specify deadlines within the program specification itself, and the hardware architecture enforces them through specific hardware policies. For example, timing instructions may be used to ensure that a segment of code has repeatable timing behavior, or that when a timing requirement is violated, an exception handler is invoked to appropriately address the timing violation. In this paper, we present the supported timing instructions, their semantics, and illustrative examples of their usage.

Electronic downloads

• liulickly_rtas2009_poster.pdf · application/pdf · 1015 kbytes

• HTML

  Isaac Liu, Ben Lickly, Hiren Patel, Edward A. Lee. <a
  href="http://chess.eecs.berkeley.edu/pubs/542.html"
  ><i>Poster Abstract: Timing Instructions - ISA
  Extensions for Timing Guarantees</i></a>, IEEE
  Real-Time and Embedded Technology and Applications
  Symposium, April, 2009.

• Plain text

  Isaac Liu, Ben Lickly, Hiren Patel, Edward A. Lee.
  "Poster Abstract: Timing Instructions - ISA Extensions
  for Timing Guarantees". IEEE Real-Time and Embedded
  Technology and Applications Symposium, April, 2009.

• BibTeX

  @proceedings{LiuLicklyPatelLee09_PosterAbstractTimingInstructionsISAExtensionsForTiming,
      title = {Poster Abstract: Timing Instructions - ISA
                Extensions for Timing Guarantees},
      organization = {IEEE Real-Time and Embedded Technology and
                Applications Symposium},
      month = {April},
      year = {2009},
      abstract = {We present our on-going efforts to guarantee the
                timing behavior of a program targeted for the
                precision timed architecture. We extend both the
                ISA and the hardware to support a set of timing
                instructions that allow programmers to control the
                execution time of a sequence of instructions.
                Programs written using these timing instructions
                specify deadlines within the program specification
                itself, and the hardware architecture enforces
                them through specific hardware policies. For
                example, timing instructions may be used to ensure
                that a segment of code has repeatable timing
                behavior, or that when a timing requirement is
                violated, an exception handler is invoked to
                appropriately address the timing violation. In
                this paper, we present the supported timing
                instructions, their semantics, and illustrative
                examples of their usage.},
      URL = {http://chess.eecs.berkeley.edu/pubs/542.html}
  }
  

Posted by Hiren Patel on 7 Apr 2009.
Groups: chess pret
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