Citation
Dai Bui, Alessandro Pinto, Edward A. Lee. "On-time Network On-Chip: Analysis and Architecture". Talk or presentation, 16, April, 2009.

Abstract
Game, multimedia, consumer and control applications today often demand high performance computing platforms that are able to deliver real-time services while satisfying tight power constraints. Multi-core architectures, supported by on-chip networks, are emerging as scalable solutions to fulfill these requirements. However, the increasing number of concurrent applications running on these platforms and the time-varying nature of the communication requirements give rise to communication delays that are difficult to predict. We propose a simple and flexible instrumentation of the on-chip network that provides services to the application software for establishing end-to-end communication flows with timing guarantees. We provide a detailed analysis of the delay in a NoC using worm-hole flow control and an algorithm that, given the state of the NoC and a request to route a new real-time flow, establishes a suitable path for the route, if one exists, or rejects the request. We implemented the new protocol in a cycle-accurate simulator to validate the accuracy of the models and the correctness of the path establishment algorithm.

Electronic downloads

• On-TimeNoC.ppt · application/vnd.ms-powerpoint · 1502 kbytes

• HTML

  Dai Bui, Alessandro Pinto, Edward A. Lee. <a
  href="http://chess.eecs.berkeley.edu/pubs/578.html"
  ><i>On-time Network On-Chip: Analysis and
  Architecture</i></a>, Talk or presentation,  16,
  April, 2009.

• Plain text

  Dai Bui, Alessandro Pinto, Edward A. Lee. "On-time
  Network On-Chip: Analysis and Architecture". Talk or
  presentation,  16, April, 2009.

• BibTeX

  @presentation{BuiPintoLee09_OntimeNetworkOnChipAnalysisArchitecture,
      author = {Dai Bui and Alessandro Pinto and Edward A. Lee},
      title = {On-time Network On-Chip: Analysis and Architecture},
      day = {16},
      month = {April},
      year = {2009},
      abstract = {Game, multimedia, consumer and control
                applications today often demand high performance
                computing platforms that are able to deliver
                real-time services while satisfying tight power
                constraints. Multi-core architectures, supported
                by on-chip networks, are emerging as scalable
                solutions to fulfill these requirements. However,
                the increasing number of concurrent applications
                running on these platforms and the time-varying
                nature of the communication requirements give rise
                to communication delays that are difficult to
                predict. We propose a simple and flexible
                instrumentation of the on-chip network that
                provides services to the application software for
                establishing end-to-end communication flows with
                timing guarantees. We provide a detailed analysis
                of the delay in a NoC using worm-hole flow control
                and an algorithm that, given the state of the NoC
                and a request to route a new real-time flow,
                establishes a suitable path for the route, if one
                exists, or rejects the request. We implemented the
                new protocol in a cycle-accurate simulator to
                validate the accuracy of the models and the
                correctness of the path establishment algorithm.},
      URL = {http://chess.eecs.berkeley.edu/pubs/578.html}
  }
  

Posted by Dai Bui on 21 Apr 2009.
Groups: ptolemy
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