Citation
Arkadeb Ghosal. "From Streaming Models to Hardware Implementations". Talk or presentation, 7, November, 2011.

Abstract
We present a graphical programming environment, DSP Designer, for hardware design and motivate key challenges for efficient synthesis and implementation. DSP Designer aims to implement applications specified in streaming models of computation, such as Static and Cyclo-Static Dataflow, on hardware targets, such as FPGAs. Prior studies have shown the effectiveness of these models for specifying multi-rate streaming applications. However, the focus of these works has primarily been on implementations for processor targets. Hardware targets bring forth new challenges related to actor definition, IP integration, and synthesis optimizations. DSP Designer specializes common dataflow models to make them suitable for hardware targets. The framework extends dataflow actor definitions to facilitate component integration and interface synthesis in hardware. The back end supports analysis methods for resource allocation, memory optimization, and scheduler generation. The front end is an interactive graphical interface to enable application design in an intuitive manner. The objective is to deliver a rigorous design and exploration framework that empowers application domain experts to become hardware designers. In this talk, we highlight key concepts underlying DSP Designer, demonstrate preliminary capabilities for exploration and implementation using practical applications, and discuss open challenges of interest to the research community. We also summarize future directions to support heterogeneous multi-target platforms, enable more expressive models of computation that capture control along with dataflow, and include formal timing specifications.

Electronic downloads

• NI%20Berkeley%20Lab%40DREAMS%20seminar.pdf · application/pdf · 2681 kbytes

• HTML

  Arkadeb Ghosal. <a
  href="http://chess.eecs.berkeley.edu/pubs/876.html"
  ><i>From Streaming Models to Hardware
  Implementations</i></a>, Talk or presentation, 
  7, November, 2011.

• Plain text

  Arkadeb Ghosal. "From Streaming Models to Hardware
  Implementations". Talk or presentation,  7, November,
  2011.

• BibTeX

  @presentation{Ghosal11_FromStreamingModelsToHardwareImplementations,
      author = {Arkadeb Ghosal},
      title = {From Streaming Models to Hardware Implementations},
      day = {7},
      month = {November},
      year = {2011},
      abstract = {We present a graphical programming environment,
                DSP Designer, for hardware design and motivate key
                challenges for efficient synthesis and
                implementation. DSP Designer aims to implement
                applications specified in streaming models of
                computation, such as Static and Cyclo-Static
                Dataflow, on hardware targets, such as FPGAs.
                Prior studies have shown the effectiveness of
                these models for specifying multi-rate streaming
                applications. However, the focus of these works
                has primarily been on implementations for
                processor targets. Hardware targets bring forth
                new challenges related to actor definition, IP
                integration, and synthesis optimizations. DSP
                Designer specializes common dataflow models to
                make them suitable for hardware targets. The
                framework extends dataflow actor definitions to
                facilitate component integration and interface
                synthesis in hardware. The back end supports
                analysis methods for resource allocation, memory
                optimization, and scheduler generation. The front
                end is an interactive graphical interface to
                enable application design in an intuitive manner.
                The objective is to deliver a rigorous design and
                exploration framework that empowers application
                domain experts to become hardware designers. In
                this talk, we highlight key concepts underlying
                DSP Designer, demonstrate preliminary capabilities
                for exploration and implementation using practical
                applications, and discuss open challenges of
                interest to the research community. We also
                summarize future directions to support
                heterogeneous multi-target platforms, enable more
                expressive models of computation that capture
                control along with dataflow, and include formal
                timing specifications.},
      URL = {http://chess.eecs.berkeley.edu/pubs/876.html}
  }
  

Posted by Patricia Derler on 8 Nov 2011.
Groups: chessworkshop
For additional information, see the Publications FAQ or contact webmaster at chess eecs berkeley edu.