SYMPHONY combines a fast simulator for digital circuits with a traditional nonlinear solver a la SPICE for the analog subcircuits. The digital simulator uses Stepwise Equivalence Conductance to model nonlinear device conductances and Piecewise Linear voltage waveforms. Device characteristics of bipolar elements in digital subcircuits are modeled by a Piecewise Linear approximation using the Extended Chebyshev Points, such that the worst case approximation error is minimized. Dynamic circuit partitioning is used to fully exploit the latency and multirate behavior of the circuit. The simulator is implemented in an event-driven framework with local and global clocks for event management. A set of benchmark results are presented on a suit of BiMOS circuits.
A transistor level power estimator which exploits algorithms for fast
circuit simulation to compute the power dissipation of CMOS circuits
is also presented. The proposed approach uses stepwise equivalent
conductance and piecewise linear waveform approximation. The power
estimator has been implemented in the SWEC framework. Experimental
results indicate that SWEC can obtain a substantial speed-up over
HSPICE (and handle circuits that HSPICE cannot) while maintaining an
accuracy of within 5-7%. Benchmark results on a suite of industry
circuits are presented.