Bassam Tabbara’s Resume

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">NAME: Bassam Tabbara

ADDRESS:

Novas Software, Inc.

2025 Gateway Place, Suite 480

San Jose, CA 95110

CITIZENSHIP: U.S. Green Card Holder
TEL: (408) 467-7893
E-MAIL: bassam@novas.com
WWW: http://embedded.eecs.berkeley.edu/Alumni/tbassam

BIOGRAPHY:

Bassam Tabbara graduated summa cum laude with a B.S. Degree in Electrical Engineering from the University of California at Riverside in 1994. He received the M.S. and Ph.D. degrees in Electrical Engineering and Computer Sciences from Berkeley in 1998 and 2000, respectively. His doctoral work is in the field of embedded system hardware/software optimization, co-verification, and co-design. He is the author of numerous papers, and co-author of two books on these topics. Bassam has been with Novas since 2000 working in product R&D in the areas of validation, verification and debug. Bassam’s research interests include optimization, synthesis, validation, and verification of hardware/software systems, embedded system design, and IP assembly and integration in System on Chip designs.

EDUCATION
5/00, Ph.D., EECS, University of California at Berkeley 3.87/4.0
Faculty Advisor: Alberto Sangiovanni-Vincentelli
Dissertation: Function/Architecture Optimization and Co-design of Embedded Systems.
5/99, Advanced to Candidacy, Ph.D., EECS, University of California at Berkeley
Title: Data Flow and Control Optimizations for Hardware and Software Co-synthesis in Embedded Systems
5/98, M.S., EECS, University of California, Berkeley, 3.90/4.0.
Thesis: Validation of Embedded Reactive Real-Time Systems Using VHDL.
12/94, B.S., EE, UC Riverside, Summa Cum Laude 3.98/4.0.

OBJECTIVE

Perform research and development in new methodologies, techniques, and tools for function and architecture modeling, design, and implementation. Specific research interest areas include: Function/architecture trade-off evaluations, (semi-formal) validation, verification, (behavioral) synthesis and optimization of hardware/software systems, embedded system design, and IP assembly.

PROFESSIONAL SKILLS

Research and Development in EDA

Embedded Systems (HW/SW co-design, hardware/software synthesis, RTOS synthesis/interface, prototyping, emulation)
Verification/Validation (HW/SW co-verification, HW/SW debug, (semi-formal) verification of hardware)

Tool development

Simulation/Verification/Debug (C/C++, Verilog/VHDL, PLI/VPI/FLI): Novas Debussy, Novas Verdi, and other advanced verification and debug tools
HW/SW Co-verification: AXYS MaxSim
HW/SW Co-design: Polis toolset from Berkeley HSC group (Polis formed basis for Cadence’s VCC 1.0)

Programming (C/C++, Java, Scripting)

RELEVANT WORK EXPERIENCE

· 5/01-Present, Technical Manager, R&D, Novas Software, Inc.

Advanced debug and verification. Duties include product R&D, collaborative

R&D with partner companies (with technical marketing), and R&D team management.

· 5/00-5/01, Senior R&D Engineer, Novas Software, Inc.

Project Leader and Developer: “Smart” validation, visualization, and debug.

September '98, Cadence Berkeley Labs, Visiting Engineer:

Automatic Flexible Implementation of Scheduling and

Communication for Mixed Hardware/Software Embedded Systems.

Summer '98, Rockwell Semiconductor Systems (now Conexant/MindSpeed), Engineering Intern:

Advanced VLSI Architecture group working on

expanding and improving the modeling in MaxSim

a hardware/software system simulation environment

for programmable components and DSPs. MaxSim tool is currently offered

by AXYS Design Automation.

Summer '97, Cadence Design Systems, Engineering Intern:

Automatic RTOS generation and interfacing with

vendor kernels for embedded systems

Summer '96, Cadence Design Systems, Engineering Intern:

Developed a prototyping system

for HW/SW co-design (Emulation system).

Summer '96, Aptix Corporation, Visiting Application Developer:

Rapid prototyping of application demo for DAC

(dashboard controller); joint effort between

Aptix, Alta group (now SLD group of Cadence),

and Magneti-Marelli.

Academic experience (1993-2000): Student Researcher, Teaching Assistant.

AWARDS/RECOGNITION

· Semiconductor Research Corporation (SRC) Graduate Fellow in 1996-2000.

· SRC Graduate Fellowship Conference Outstanding Research Presentation in 1999.

· GAANN Fellowship in Spring 1999.

· 1994 Marlan & Rosemary Bourns College of Engineering Outstanding Student Commencement Award which is given for academic excellence, based upon faculty recommendations.

· Student Marshall for the College of Engineering during the 1993-1994 Commencement ceremonies.

· Award of UCR Foundation Distinguished Undergraduate Fellowship for the 93-94 academic year that will fund the research in the design, and prototyping of the interface for digital motion processors with the IBM PC/AT motherboard for an autonomous robot.

· Undergraduate Honors Convocation in 1994 in recognition of Academic Scholarship based on outstanding record for a GPA of 3.9+.

· Scholarship award from the Society of American Military Engineers for outstanding scholastic achievement in the field of engineering.

· Undergraduate Honors Convocation in 1993 in recognition of outstanding Academic Program Service, selected by the Electrical Engineering academic program as the major with the finest research and academic performance for personal research on hydrogen fuel cells and their application in electric vehicles, and assistance in faculty research.

· National Science Foundation Research Experience for Undergraduates (NSF-REU) funded research in machine vision, and knowledge-based systems for 3-D object recognition at the College of Engineering, University of California at Riverside in Summer ' 94.

· Dean's Honor List throughout undergraduate academic career.

· Dean's Letter of Recognition throughout undergraduate academic career.

· President's Letter of Recognition at the California State University, San Bernardino (CSUSB) in 1992.

· Pittman Scholarship for the 91-92 academic year, awarded by the School of Natural Sciences at CSUSB for outstanding academic performance.

· Freshman Achievement Award for 90-91 academic year, awarded by the chemistry department at CSUSB for superior performance in the General Chemistry sequence. Award: CRC Handbook of Chemistry and Physics, 71st Edition from CRC Press Inc.

TECHNICAL ACTIVITIES

· Reviewer for DAC (99-present), ICCAD (99)

· Member of Accellera (previously OVI) Formal Verification Technical Committee, SystemVerilog Assertion Language Committee, and SystemVerilog C/C++ API committee

· Semiconductor Research Corporation (SRC) Alumnus

· Member of IEEE.

o Served as Vice-chairman of the IEEE chapter at UCR in 94-95.

· Member of the Golden Key National Honor Society.

SELECTED PUBLICATIONS
1996 - 2000

Conference Publications

Scott Sandler, Yu-Chin Hsu, George Bakewell, Bassam Tabbara, Martin Rowe, " Behavior Analysis for SoC Debugging", IP Based SoC Design (IPSOC), October 2002.
Bassam Tabbara, Abdallah Tabbara, Alberto Sangiovanni-Vincentelli, "Task Response Time Optimization Using Cost-Based Operation Motion", CODES, May 2000.
Bassam Tabbara, Alberto Sangiovanni-Vincentelli, "Data Flow and Control Optimizations for Hardware and Software Co-synthesis in Embedded Systems", SRC Graduate Fellowship Conference, Sept. 1999.
Bassam Tabbara, Abdallah Tabbara, "Simulation-Oriented Behavioral Verification", Mentor Graphics Users' Group Conference, Sept. 1999.
Lisa Guerra, Joachin Fitzner, Dipankar Talukdar, Chris Schlager, Bassam Tabbara, Vojin Zivojnovic, "Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification", DAC, June 1999.
Bassam Tabbara, Enrica Filippi, Luciano Lavagno, Marco Sgroi, Alberto Sangiovanni-Vincentelli, "Fast Hardware-Software Co-simulation Using VHDL Models", Design Automation and Test in Europe (DATE), March 1999.
Bassam Tabbara, Alberto Sangiovanni-Vincentelli, "Hardware/Software Co-simulation of Reactive Real-Time Systems Using VHDL", TECHCON, SRC Task ID 324.028, September 1998.
B. Tabbara, L. Lavagno, and A. Sangiovanni- Vincentelli; "Fast Hardware-Software Co-Simulation using Software Synthesis and Estimation", IEEE International High Level Design Validation and Test Workshop, November 14-15, 1997.
Bassam Tabbara, Luciano Lavagno, Alberto Sangiovanni-Vincentelli, "Synthesis of Externally Synchronous Internally Asynchronous Circuits", IEEE/ACM International Workshop on Logic Synthesis (IWLS), Lake Tahoe, CA, May 1997.
F. Balarin, M. Chiodo, L. Lavagno, A. Jurecska, B. Tabbara, A. SangiovanniVincentelli, "Automatic Generation of a Real-Time Operating System for Embedded Systems", 5th International Workshop on Hardware/Software Co-Design Codes/CASHE '97, Braunschweig, Germany, March 1997.
B. Tabbara, L. Lavagno and A. Sangiovanni-Vincentelli; Univ. of California/Berkeley, "Fast Hardware/Software Co-Simulation in VHDL", TECHCON'96, Phoenix, AZ, 07/02/96, SRC Task ID 324.028, 4 pp.

Journals

Abdallah Tabbara, Bassam Tabbara, Robert K. Brayton, A. Richard Newton, " Integration of Retiming with Architectural Floorplanning", Integration, The VLSI Journal, 29, 1, 25-43, March, 2000.

Books

Bassam Tabbara, Abdallah Tabbara, Alberto Sangiovanni-Vincentelli, "Function/Architecture Optimization and Co-Design of Embedded Systems", Kluwer Academic Publishers, MA, USA, Hardbound, ISBN 0-7923-7985-3, September 2000
Felice Balarin, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Claudio Passerone, Alberto Sangiovanni-Vincentelli, Ellen Sentovich, Kei Suzuki, and Bassam Tabbara, "Hardware-Software Co-Design of Embedded Systems: The POLIS Approach", Kluwer Academic Publishers, MA, USA, May 1997.
Joseph Norbeck, James Heffel, Tom Durbin, Bassam Tabbara, John Bowden, Michelle Montano, "Hydrogen Fuel for Surface Transportation", published by the Society of Automotive Engineers (SAE), Inc, Warrendale, PA, 1996.

Research Reports

<big></big>B. Tabbara, "Function/Architecture Optimization and Co-design of Embedded Systems", Ph.D. Dissertation, University of California at Berkeley, Electronics Research Laboratory, Memorandum No. UCB/ERL M00/21, May 17, 2000.
Bassam Tabbara, Abdallah Tabbara, Alberto Sangiovanni-Vincentelli, "Hardware and Software Representation, Optimization, and Co-synthesis for Embedded Systems", University of California at Berkeley Electronics Research Laboratory, Memorandum No. UCB/ERL M00/7, Jan. 1, 2000.
Abdallah Tabbara, Bassam Tabbara, "Inter-Module Interconnect Strategy for System on Chip Applications", University of California at Berkeley Electronics Research Laboratory, Memorandum No. UCB/ERL M99/45, Sept. 1, 1999.
Bassam Tabbara, Abdallah Tabbara, "Simulation-Oriented Behavioral Verification", University of California at Berkeley Electronics Research Laboratory, Memorandum No. UCB/ERL M99/38, July 13, 1999.
Bassam Tabbara, Alberto Sangiovanni-Vincentelli, "Data Flow and Control Optimizations for Hardware and Software Co-synthesis in Embedded Systems", University of California at Berkeley Electronics Research Laboratory, Memorandum No. UCB/ERL M99/31, June 15, 1999.
B. Tabbara, E. Filippi, Luciano Lavagno, Alberto Sangiovanni-Vincentelli, "Fast Hardware-Software Co-simulation Using VHDL Models", University of California at Berkeley Electronics Research Laboratory, Memorandum No. UCB/ERL M98/54, Sept. 5, 1998. Also appeared (in Italian) as:
E. Filippi, L. Lavagno, Alberto Sangiovanni-Vincentelli, M. Sgroi, B. Tabbara, " Metodologia di Co-simulazione Hardware-Software ad alta Velocita Basata Sull'utilizzo di Modelli VHDL", CSELT Rapporti Technici, N. 4 - Agosto 1999.
B. Tabbara, E. Filippi, Luciano Lavagno, Alberto Sangiovanni-Vincentelli, "RTL Generation of Hardware Components of a Mixed Hardware/Software Implementation of Embedded Systems for System Level Co-simulation in VHDL", University of California at Berkeley Electronics Research Laboratory, Memorandum No. UCB/ERL M98/55, Sept. 5, 1998.
<big></big>B. Tabbara, "Validation of Reactive Real-Time Systems Using VHDL", M.S. Thesis, University of California at Berkeley, May 1998.