Electronic Systems Design Seminar
The merging of computers, consumer and communication disciplines gives rise to very fast growing markets for personal communication, multi-media and broadband networks. Technology advances lead to platforms with enormous processing capacity that are however not matched with a required increase in system design productivity.
One of the most critical bottlenecks is the very dynamic concurrent behaviour of many of these new applications. They are fully specified in software oriented languages (like Java, UML, SDL, C++) and still need to be executed in real-time cost/energy-sensitive way on the heterogeneous SoC platforms. The main issue is that fully design-time based solutions as proposed earlier in the compiler and system synthesis communicaties cannot solve the problem, and run-time solutions as present in nowadays operating systems are too inefficient in terms of cost optimisation (especially energy consumption) and are also not adapted for the real-time constraints (even RTOS kernels).
This dynamic nature is especially emerging because of the quality-of-service (QoS) aspects of these multi-media and networking applications. Prominent examples of this can be found in the recent MPEG4/JPEG2000 standards and especially the new MPEG21 standard. In order to deal with these dynamic issues where tasks and complex data types are created and deleted at run-time based on non-deterministic events, a novel system design paradigm is required. This presentation will focus on the new requirements that result in system-level synthesis. In particular a "task concurrency management" (TCM) problem formulation will be proposed, with special focus on the formalisation of the most crucial optimisation problems, where power consumption is one of the main cost issues. The concept of Pareto curve based exploration is crucial in these formulations and their solutions.
Francky Catthoor received the engineering degree and a Ph.D. in electrical engineering from the Katholieke Universiteit Leuven, Belgium in 1982 and 1987 respectively. From September 1983 till June 1987 he has been a researcher in the area of VLSI design methodologies for Digital Signal Processing, with Prof. Hugo De Man and Prof. Joos Vandewalle as Ph.D. thesis advisors. Since 1987, he has headed several research domains in the area of high-level and system synthesis techniques and architectural methodologies, all within the Design Technology for Integrated Information and Telecom Systems (DESICS - formerly VSDM) division at the Inter-university Micro-Electronics Center (IMEC), Heverlee, Belgium. He was part-time assistant professor at the EE department of the K.U.Leuven since 1989, and full professor (part-time) since 2000.
His current research activities belong to the field of architecture design methods and system-level exploration for power and area, mainly oriented towards memory management and global data transfer optimization. The major target application domains are real-time signal and data processing algorithms in image, video and end-user telecom applications, and data-structure-dominated modules in telecom networks. Both customized architectures and programmable (parallel) multimedia processors are targeted.
In 1986 he received the Young Scientist Award from the Marconi International Fellowship Council. He was an associate editor for the "IEEE Transactions on VLSI Systems" for the period 1995/1998. Since 1999 he is an associate editor or the "IEEE Transactions on Multi-Media" and since 1996 an editor for Kluwer's "Journal of VLSI Signal Processing". Begin 1997 he became member of the steering board for the VLSI Technical Committee of the IEEE Circuits & Systems Society and since 1999 he also serves on the IEEE Trans. on VLSI Systems steering board. He was the program chair of the 1997 IEEE Intnl. Symposium on System Synthesis (ISSS) and the general chair for the 1998 ISSS. He is also the program chair and main organizer of the 2001 IEEE Signal Processing Systems (SIPS) conference.