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Electronic Systems Design Seminar
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Modern deep-submicron
processes enable an extremely large number of devices per die, but design and
manufacturing costs limit production to ultra-high-volume designs. As a result,
the majority of future SoC designs may consist of
user-programmable replicated structures such as FPGA and RISC cores. The Xilinx Virtex2Pro with large a FPGA and 4 PPC processors is
such an example. Simultaneously designers need new design tools to deliver such
a SoC within shorter market windows.
This talk presents the prototype
tool called Mobius, which compiles an algol-like statically-allocated multi-threaded language to
hardware and/or software. Based on the CSP-methodology, threads synchronize and
communicate enabling hardware and software to interact seamlessly. The generated
software is ANSI-C or assembler, and has a built-in scheduler. The generated
hardware is synthesizable verilog, and uses
handshaking circuits resulting in a globally asynchronous / locally synchronous
(GALS) system which minimizes timing closure issues. The ease of designing
large systems and Quality-of-Results experiments show that Mobius
is quite attractive compared to hand-coding.
Per Ljung
is the founder of CodeTronix LLC where he is
developing rapid prototyping tools for SoC hardware
and software.
As a
At