The SYNTHESIS1 System for FSM Synthesis
The SYNTHESIS1 system for logic synthesis is useful for very complicated
Finite State Machines (FSM), with hardly any constraints on their size,
that is, the number of inputs, outputs, and states.
Why is it so important to synthesize FSMs? There are at least two serious
- FSMs are unique for each project. To design a data path, you can use
very large library units from the previous projects. It is not possible
for FSM as you cannot use former projects for new FSM designs.
- In the last few years, the fraction of FSMs in each project has considerably
increased. There are also some reasons for this tendency:
- implementation of software as hardware
- complex specialized processors with very complex embedded functions
- parallel processors with a complex control.
SYNTHESIS1 contains the following subsystems:
- Algorithmic State Machine (ASM) Transformer. This subsystem performs
ASM minimization, combining, and decomposition.
- Finite State Machine Synthesizer. This subsystem performs FSM transition
table construction, state assignment and FSM decomposition
- Logic Circuit Synthesizer. This subsystem performs logic circuit synthesis
with gates, LUTs, PLAs, PLAMs etc.
This talk will consist mainly of a demonstration of the SYNTHESIS1
Samary Baranov, "CAD System SYNTHESIS1
for FSMs Synthesis"