THE V++ HARDWARE DESIGN LANGUAGE
V++ is an object-oriented extension to the SMV Hardware Description Language. V++ contains one central, novel feature: an integrated communications architecture that is the exact analog, in hardware, to the program stack in software; in brief, an automatically-designed, pervasive structure which moves data transparently from one piece of hardware to another. In V++, modules exchange data by sending messages to each other (the hardware equivalent of procedure call), rather than by asserting values on signal wires (the hardware equivalent of global variable assignment); the V++ compiler synthesizes the communication machinery to deliver messages from one module to another. In this talk, we will first describe why we believe such a structure is valuable to hardware designers, and why it is particularly important now. We will then give a brief description of the implementation mechanism, and close with a simple example of V++ in action.
This talk describes joint work with the V++ team, whose members include
Berkeley doctoral students S-T Cheng and Tom Truman.
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