Prof. Niraj K. Jha
Niraj K. Jha received his B.Tech. degree in Electronics and Electrical Communication Engineering from Indian Institute of Technology, Kharagpur, India in 1981, M.S. degree in Electrical Engineering from S.U.N.Y. at Stony Brook, NY in 1982, and Ph.D. degree in Electrical Engineering from University of Illinois, Urbana, IL in 1985. He is a Professor of Electrical Engineering at Princeton University. He has served as an Associate Editor of IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, and is currently serving as an Associate Editor of IEEE Transactions on VLSI Systems and of Journal of Electronic Testing: Theory and Applications (JETTA). He has served as the guest editor for the JETTA special issue on high-level test synthesis. He has also served as the Program Chairman of the 1992 Workshop on Fault-Tolerant Parallel and Distributed Systems. He is the recipient of the AT&T Foundation award and the NEC Preceptorship award for research excellence. He has co-authored two books titled Testing and Reliable Design of CMOS Circuits (Kluwer) and High-Level Power Analysis and Optimization (Kluwer). He has authored or co-authored more than 150 technical papers. He has co-authored three papers which have won the Best Paper Award at IEEE International Conference on Computer Design (1993), IEEE International Symposium on Fault-Tolerant Computing (1997), and International Conference on VLSI Design (1998). He has also received nominations for Best Paper Awards at three other conferences. He is a fellow of IEEE. His research interests include digital system testing, fault-tolerant computing, computer-aided design of integrated circuits, distributed computing and real-time computing.
Email address: firstname.lastname@example.org
Web page: http://www.ee.princeton.edu/~jha
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