EECS 298-11: CAD Seminar
Wednesday, February 15, 5pm
531 Cory Hall, Hogan Room

           "A Design Environment for Multi-Million Transistor
	    Chip Design: Created by Designers for Designers"

	  	           Mehdi Hatamian
		     Silicon Design Experts, Inc.

This talk describes a CAD environment developed and used at Silicon Design
Experts, Inc. for multi-million transistor structured-custom chip designs. The
original driving force behind creating the first set of tools in this
environment was the frustration in using commercial CAD tools to handle large
designs.  The environment is built based on a philosophy that addresses
algorithm, architecture, technology, circuit design, layout design and
verification, and many other detailed issues, all in one integrated
environment.  Setting up such a design environment required the creation of
many new tools that not only are capable of handling multi-million transistor
designs, but also allow one to optimize across the entire spectrum from the
theoretical concept down to the final layout, keeping the parameters of the
underlying fabrication technology in mind. After 4 years in the making, the
result is a system that, along with its library of full-custom leaf cells,
macro-blocks and mega-modules, achieves chip sizes that are anywhere from a
factor of 4 to 8 smaller than what can be achieved with other approaches.
Examples of commercial chips designed at SDE with this environment, including
an MPEG encoder chip performing over 10 billion operations per second, are
given and discussed.  Performance tables are presented for a few major tools in
this environment including a SPICE simulator that can simulate multi-million
device circuits in one chunk on a desktop workstation.

Future Seminars:

February 22 - Forrest Brewer, UC Santa Barbara
              "New Results in BDD-Based Scheduling"

March 1 - Vijay Saraswat, Xerox PARC

March 7 (NOTE: Tuesday) - Alberto Sangiovanni-Vincentelli
              "Hardware/Software Codesign"

March 15 - Alice Parker, USC