Rajeev Ranjan obtained his B. Tech. degree from Indian Institute of Technology, Kanpur, India in 1990. He received his M.S. from Univeristy of Illinois at Urbana-Champaign in 1992. In 1997 he finished his doctorate from University of California at Berkeley. During the course of his Ph.D., he was involved in the development of verification tool "VIS" as one of the primary architects. He has also authored breadth-first manipulation based bdd package named "CAL". Currently he is a member of Advanced Technology Group at Synopsys. His primary research interest area is formal verification of digital circuits.
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