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Why Formal DesignVerification?
Why Formal DesignVerification?
- Designs are getting more complex
- simulation becoming more inadequate
- time to market tighter and more critical
- Growing interest in many companies
- some major successes
- designers becoming convinced of need
- small verification groups starting up
- IBM, Intel, Motorola, ATT, Cadence, Siemens, NEC, Fujitsu, SGI, Sun, HP, …
- Tools coming up to task of real designs
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