New work

Further integrations of Tycho into Ptolemy.
Edward A. Lee, John Reekie, Kevin Chang, Christopher Hylands and many others.
The Tycho Release notes describe the changes to Tycho more completely, below are some highlights:
  • The Java/Tycho interface, including a Process Networks Sieve of Eratosthenes demo.
  • Compilation and dynamic loading of C modules at runtime.
  • Improved preferences manager.
  • An interface that allows the user to jump to C,C++ and Java compiler errors.
  • Ptolemy Retargetting Tool
  • Finite State Machine (FSM) domain
    Bilung Lee - FSM Palette - Further documentation
    Synchronous/Reactive (SR) Domain
    Stephen Edwards - SR Palette - Further documentation
    Code Generation for the TMS320C50 DSP Domain
    Luis Gutierrez, Brian L. Evans (UT Austin) C50 Palette
    Type System Modifications
    Tom Lane(Structured Software Systems), Christopher Hylands - Further documentation
    HTML documentation of stars.
    ptlang has been modified to create HTML documentation instead of troff documentation. A new ptlang keyword named htmldoc has been added to ptlang.
    The explanation sections in the Ptolemy builtin stars have been converted to htmldoc sections.
    For a simple example, see the SDFRamp star documentation.
    The HTML star documentation is viewable outside Ptolemy and Tycho with a standard HTML viewer. The HTML star documentation is also viewable as a hierarchical table of contents with Tycho. The documentation can be viewed as both a textual table of contents, and as a graphical forest
    Edward A. Lee, Christopher Hylands
    AcyLoopScheduler
    This scheduler does joint code/data minimization; it generates single appearance schedules optimized for buffer memory usage. Very useful in code generation, especially in assembly language domains.
    Praveen Murthy
    UltraSparc VIS C Code Generation Target
    The VIS target only works under sol2.5.cfront only, and it requires the Sun VIS Software Development Kit
    William Chen (Columbia University), John Reekie - Further documentation
    TychoTarget C Code Generation Target
    The TychoTarget generates output that can be compiled and loaded into Tycho. It support creation of customized control panels using Tycho.
    Sunil Bhave - John Reekie - Further documentation
    CGCostTarget
    For every star in a CG schematic, it will report implementation cost. This information can be fed into a hardware/software partitioning tool or a scheduler.
    Brian L. Evans (UT Austin), Raza Ahmed
    Cadence Leapfrog VHDL Target
    $PTOLEMY/src/domains/vhdl/targets contains the Cadence Leapfrog VHDL Target. This target, SimLF-VHDL, allows simulation of generated VHDL code with the Leapfrog simulator from Cadence. This target is analogous to the SimVSS-VHDL target, which supports simulation with the Synopsys VHDL System Simulator.
    Xavier Warzee (Thomson CSF), Michael C. Williamson - Further Documentation


    Up to: What's New in Ptolemy 0.7 - Forward to: New Stars and Demos
    Copyright © 1997, The Regents of the University of California. All rights reserved.
    Last updated 04/30/97, comments to ptolemy@ptolemy.eecs.berkeley.edu.