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libraries/onchipcommunication/systemc/SourceIp.hGo to the documentation of this file.00001 //============================================================================ 00002 // Author : Alessandro Pinto <apinto@eecs.berkeley.edu> 00003 // University of California, Berkeley 00004 // 545 Cory Hall, Berkeley, CA 94720 00005 // Copyright : See COPYING file that comes with this distribution 00006 //============================================================================ 00007 00008 #ifndef SOURCEIP_H_ 00009 #define SOURCEIP_H_ 00010 00011 #include <vector> 00012 #include "systemc.h" 00013 #include "float.h" 00014 #include "Types.h" 00027 using namespace std ; 00028 00029 template< int FlitWidth > 00030 class SourceIp : public sc_module 00031 { 00032 00033 public: 00034 00035 sc_out< sc_bv< FlitWidth > > DataOut ; 00036 sc_out< bool > ValidOut; 00037 sc_in< bool > AckIn ; 00038 sc_in< bool > FullIn ; 00039 sc_in<bool> Clock ; 00040 00041 00042 SC_HAS_PROCESS( SourceIp ) ; 00043 00044 void Fsm( ) ; 00045 00046 SourceIp( sc_module_name pName , int pId , vector< Flow > pFlows ) : sc_module( pName ) { 00047 00048 mId = pId ; 00049 00050 mFlows = pFlows ; 00051 00052 mFlitCount.resize( mFlows.size( ) , 0 ) ; 00053 00054 mSentBits.resize( mFlows.size( ) , 0 ) ; 00055 00056 mState = IDLE ; 00057 00058 mWstate = WIDLE ; 00059 00060 cout << "SourceIp " << name( ) << " initialization done " << endl ; 00061 00062 SC_THREAD( Fsm ) ; 00063 sensitive_pos << Clock ; 00064 00065 00066 }; 00067 00068 00069 enum{IDLE, FLIT } mState; 00070 enum{ WIDLE , TX } mWstate ; 00071 00072 private: 00073 00074 int mId ; 00075 00076 vector< Flow > mFlows ; 00077 00078 vector< int > mFlitCount; ; 00079 00080 vector< int > mSentBits; 00081 00082 vector< sc_bv< FlitWidth > > mCurrentPacket ; 00083 00084 int mCurrentDest ; 00085 00086 00087 } ; 00088 00089 template< int FlitWidth > 00090 void SourceIp< FlitWidth >::Fsm( ) 00091 { 00092 00093 00094 int Index ; 00095 cout << "Source " << name( ) << " running " << endl ; 00096 00097 while( true ){ 00098 00099 wait( ) ; 00100 00101 switch( mState ) { 00102 00103 case IDLE: 00104 00105 //cout << "Source " << name( ) << " to destination " << mDestId[CurrentDest].to_int() << " " << mFlitSent[Index] << endl ; 00106 00107 //Pick the flow that is laggin behind 00108 double MinSlack ; 00109 MinSlack = DBL_MAX ; 00110 for( int i = 0 ; i < mFlows.size( ) ; i++ ) { 00111 if ( ( mSentBits[i] / ( sc_simulation_time( )*1e-9 )) - mFlows[i].Bandwidth < MinSlack ) { 00112 MinSlack = ( mSentBits[i] / ( sc_simulation_time( )*1e-9 )) - mFlows[i].Bandwidth ; 00113 mCurrentDest = i ; 00114 } 00115 } 00116 00117 //Pick a random destination 00118 //mCurrentDest = rand( )%(mFlows.size( ) ) ; 00119 00120 if ( MinSlack < 0 ) { 00121 //Build up the packet 00122 mCurrentPacket.clear( ) ; 00123 mCurrentPacket.resize( mFlows[mCurrentDest].PacketSize , 0 ) ; 00124 00125 //Header flit 00126 mCurrentPacket[ mFlows[mCurrentDest].PacketSize - 1 ].range( 7, 0) = mId ; 00127 mCurrentPacket[ mFlows[mCurrentDest].PacketSize - 1 ].range(15 , 8) = mFlows[mCurrentDest].Destination ; 00128 mCurrentPacket[ mFlows[mCurrentDest].PacketSize - 1 ].range( 23,16) = mFlows[mCurrentDest].PacketSize ; 00129 mCurrentPacket[ mFlows[mCurrentDest].PacketSize - 1 ].range(31,24) = mFlows[mCurrentDest].PacketSize ; 00130 00131 //Random data 00132 for( int i = mFlows[mCurrentDest].PacketSize - 2 ; i > 0 ; i-- ) { 00133 mCurrentPacket[i] = rand( ) ; 00134 } 00135 00136 //Tail flit has a time stamp 00137 mCurrentPacket[0] = (int) sc_simulation_time( ) ; 00138 00139 mFlitCount[mCurrentDest] = mFlows[mCurrentDest].PacketSize ; 00140 mState = FLIT ; 00141 } else 00142 mState =IDLE ; 00143 00144 break; 00145 00146 case FLIT : 00147 00148 switch( mWstate ) { 00149 00150 case WIDLE: 00151 if ( ! FullIn ) { 00152 DataOut = mCurrentPacket[ mFlitCount[mCurrentDest] - 1 ] ; 00153 //cout << "Source " << name( ) << " Sending Flit " << mFlitCount[mCurrentDest] << " to " << mFlows[mCurrentDest].Destination << endl ; 00154 //cout<< "Worde sent " << curr_out << endl ; 00155 ValidOut = true ; 00156 mWstate = TX ; 00157 } 00158 break; 00159 case TX: 00160 if ( AckIn ) { 00161 ValidOut =false ; 00162 mSentBits[mCurrentDest] = mSentBits[mCurrentDest] + FlitWidth; 00163 mFlitCount[mCurrentDest] -- ; 00164 if ( mFlitCount[mCurrentDest] == 0 ) 00165 mState = IDLE ; 00166 else 00167 mState = FLIT ; 00168 mWstate = WIDLE ; 00169 } 00170 break; 00171 00172 } 00173 } 00174 } 00175 } 00176 00177 00178 #endif /*SOURCEIP_H_*/ Generated on Sun Sep 7 18:37:42 2008 for COSI by 1.5.4 |