Achieving Ultralow Standby Power With an Efficient SCCMOS Bias Generator
Yoonmyung Lee, Mingoo Seok, Scott Hanson, Dennis Sylvester, David Blaauw

Citation
Yoonmyung Lee, Mingoo Seok, Scott Hanson, Dennis Sylvester, David Blaauw. "Achieving Ultralow Standby Power With an Efficient SCCMOS Bias Generator". IEEE Transactions on Circuits and Systems II, 2013.

Abstract
Standby power frequently dominates the power budget of battery-operated ultralow power sensor nodes. Reducing standby power is therefore a key challenge for further power reduction. Applying known circuit techniques for standby power reduction is challenging since standby power of state-of-the-art sensor node systems is now on the order of nanowatts or less. Hence, the overhead of any leakage reduction technique quickly overshadows any gains. This brief proposes an efficient implementation method for super cutoff CMOS that exploits the unique conditions of power gating to enable a highly efficient charge pump design. The proposed techniques are applied to logic blocks and memory devices. For a very low initial standby power value of tens of picowatts, standby power reduction of up to 19.3$times$ and 29% is achieved for logic blocks and memory, respectively.

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  • HTML
    Yoonmyung Lee, Mingoo Seok, Scott Hanson, Dennis Sylvester,
    David Blaauw. <a
    href="http://www.terraswarm.org/pubs/217.html"
    >Achieving Ultralow Standby Power With an Efficient
    SCCMOS Bias Generator</a>, <i>IEEE Transactions
    on Circuits and Systems II</i>,  2013.
  • Plain text
    Yoonmyung Lee, Mingoo Seok, Scott Hanson, Dennis Sylvester,
    David Blaauw. "Achieving Ultralow Standby Power With an
    Efficient SCCMOS Bias Generator". <i>IEEE
    Transactions on Circuits and Systems II</i>,  2013.
  • BibTeX
    @article{LeeSeokHansonSylvesterBlaauw13_AchievingUltralowStandbyPowerWithEfficientSCCMOSBias,
        author = {Yoonmyung Lee and Mingoo Seok and Scott Hanson and
                  Dennis Sylvester and David Blaauw},
        title = {Achieving Ultralow Standby Power With an Efficient
                  SCCMOS Bias Generator},
        journal = {IEEE Transactions on Circuits and Systems II},
        year = {2013},
        abstract = {Standby power frequently dominates the power
                  budget of battery-operated ultralow power sensor
                  nodes. Reducing standby power is therefore a key
                  challenge for further power reduction. Applying
                  known circuit techniques for standby power
                  reduction is challenging since standby power of
                  state-of-the-art sensor node systems is now on the
                  order of nanowatts or less. Hence, the overhead of
                  any leakage reduction technique quickly
                  overshadows any gains. This brief proposes an
                  efficient implementation method for super cutoff
                  CMOS that exploits the unique conditions of power
                  gating to enable a highly efficient charge pump
                  design. The proposed techniques are applied to
                  logic blocks and memory devices. For a very low
                  initial standby power value of tens of picowatts,
                  standby power reduction of up to 19.3$times$ and
                  29% is achieved for logic blocks and memory,
                  respectively.},
        URL = {http://terraswarm.org/pubs/217.html}
    }
    

Posted by David Blaauw on 21 Nov 2013.
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