WCET-Aware Dynamic Scratchpad Memory Management
Yooseong Kim, David Broman, Aviral Shrivastava, Edward A. Lee

Citation
Yooseong Kim, David Broman, Aviral Shrivastava, Edward A. Lee. "WCET-Aware Dynamic Scratchpad Memory Management". Talk or presentation, 13, February, 2014; Poster presented at the 2014 Berkeley EECS Annual Research Symposium.

Abstract
Using scratchpad memories requires explicit management, and in order to exploit localities of large applications, dynamic management techniques are needed. This poster shows an overview of our work on improving worst-case performance of dynamic management techniques. This lies in the compiler layer of the Precision Timed (PRET) machine project, where a compiler makes use of its knowledge of underlying memory hierarchy to efficiently compile applications for worst-case performance.

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Citation formats

• HTML

  Yooseong Kim, David Broman, Aviral Shrivastava, Edward A.
  Lee. <a
  href="http://www.terraswarm.org/pubs/271.html"
  ><i>WCET-Aware Dynamic Scratchpad Memory
  Management</i></a>, Talk or presentation,  13,
  February, 2014; Poster presented at the 2014 Berkeley EECS
  Annual Research Symposium.

• Plain text

  Yooseong Kim, David Broman, Aviral Shrivastava, Edward A.
  Lee. "WCET-Aware Dynamic Scratchpad Memory
  Management". Talk or presentation,  13, February, 2014;
  Poster presented at the 2014 Berkeley EECS Annual Research
  Symposium.

• BibTeX

  @presentation{KimBromanShrivastavaLee14_WCETAwareDynamicScratchpadMemoryManagement,
      author = {Yooseong Kim and David Broman and Aviral
                Shrivastava and Edward A. Lee},
      title = {WCET-Aware Dynamic Scratchpad Memory Management},
      day = {13},
      month = {February},
      year = {2014},
      note = {Poster presented at the 2014 Berkeley EECS Annual
                Research Symposium},
      abstract = {Using scratchpad memories requires explicit
                management, and in order to exploit localities of
                large applications, dynamic management techniques
                are needed. This poster shows an overview of our
                work on improving worst-case performance of
                dynamic management techniques. This lies in the
                compiler layer of the Precision Timed (PRET)
                machine project, where a compiler makes use of its
                knowledge of underlying memory hierarchy to
                efficiently compile applications for worst-case
                performance.},
      URL = {http://terraswarm.org/pubs/271.html}
  }
  

Posted by Yooseong Kim on 18 Feb 2014.
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