Citation
Pat Pannuto, Ye-Sheng Kuo, Zhi Yoong Foo, Benjamin Kempke, Gyouho Kim, Ronald Dreslinski, David Blaauw, Prabal Dutta. "MBus: An Ultra-Low Power Interconnect Bus for Next Generation Nanopower Systems". IEEE/ACM International Symposium on Microarchitecture, 13, December, 2014.

Abstract
As we show in this paper, I/O has become the limiting factor in scaling down size and power toward the goal of invisible computing. Achieving this goal will require composing optimized and specialized--yet reusable--components with an interconnect that permits tiny, ultra-low power systems. In contrast to today's interconnects which are limited by power-hungry pull-ups or high-overhead chip select lines, our approach provides a superset of common bus features but at lower power, with fixed area and pin count, using fully synthesizable logic, and with surprisingly little protocol overhead. We present MBus, a new 22.6 pJ/bit/chip chip-to-chip interconnect made of two "shoot-through" rings. MBus facilitates ultra-low power system operation by implementing automatic power-gating of each chip in the system. In addition, we introduce a new bus primitive: power oblivious communication, which guarantees message reception regardless of the recipient's power state when the message is sent. This disentangles power-management from communication, greatly simplifying the creation of viable, modular, and heterogeneous systems that operate on the order of nano watts. To evaluate the viability, power, performance, overhead, and scalability of our design, we build both hardware and software implementations of MBus and show its seamless operation across FPGAs and six custom chips from three different semiconductor processes. A three-chip, 2.2 mm3 MBus system draws 8 nW of total system standby power and uses only 22.6 pJ/bit/chip for communication. This is the lowest power for any system bus with MBus's feature set.

Electronic downloads

• https://www.src.org/library/publication/p070881/. (Link to the paper on the SRC website.)
• http://dx.doi.org/10.1145/2749469.2750376

• HTML

  Pat Pannuto, Ye-Sheng Kuo, Zhi Yoong Foo, Benjamin Kempke,
  Gyouho Kim, Ronald Dreslinski, David Blaauw, Prabal Dutta.
  <a
  href="http://www.terraswarm.org/pubs/330.html"
  >MBus: An Ultra-Low Power Interconnect Bus for Next
  Generation Nanopower Systems</a>, IEEE/ACM
  International Symposium on Microarchitecture, 13, December,
  2014.

• Plain text

  Pat Pannuto, Ye-Sheng Kuo, Zhi Yoong Foo, Benjamin Kempke,
  Gyouho Kim, Ronald Dreslinski, David Blaauw, Prabal Dutta.
  "MBus: An Ultra-Low Power Interconnect Bus for Next
  Generation Nanopower Systems". IEEE/ACM International
  Symposium on Microarchitecture, 13, December, 2014.

• BibTeX

  @inproceedings{PannutoKuoFooKempkeKimDreslinskiBlaauwDutta14_MBusUltraLowPowerInterconnectBusForNextGenerationNanopower,
      author = {Pat Pannuto and Ye-Sheng Kuo and Zhi Yoong Foo and
                Benjamin Kempke and Gyouho Kim and Ronald
                Dreslinski and David Blaauw and Prabal Dutta},
      title = {MBus: An Ultra-Low Power Interconnect Bus for Next
                Generation Nanopower Systems},
      booktitle = {IEEE/ACM International Symposium on
                Microarchitecture},
      day = {13},
      month = {December},
      year = {2014},
      abstract = {As we show in this paper, I/O has become the
                limiting factor in scaling down size and power
                toward the goal of invisible computing. Achieving
                this goal will require composing optimized and
                specialized--yet reusable--components with an
                interconnect that permits tiny, ultra-low power
                systems. In contrast to today's interconnects
                which are limited by power-hungry pull-ups or
                high-overhead chip select lines, our approach
                provides a superset of common bus features but at
                lower power, with fixed area and pin count, using
                fully synthesizable logic, and with surprisingly
                little protocol overhead. We present MBus, a new
                22.6 pJ/bit/chip chip-to-chip interconnect made of
                two "shoot-through" rings. MBus facilitates
                ultra-low power system operation by implementing
                automatic power-gating of each chip in the system.
                In addition, we introduce a new bus primitive:
                power oblivious communication, which guarantees
                message reception regardless of the recipient's
                power state when the message is sent. This
                disentangles power-management from communication,
                greatly simplifying the creation of viable,
                modular, and heterogeneous systems that operate on
                the order of nano watts. To evaluate the
                viability, power, performance, overhead, and
                scalability of our design, we build both hardware
                and software implementations of MBus and show its
                seamless operation across FPGAs and six custom
                chips from three different semiconductor
                processes. A three-chip, 2.2 mm3 MBus system draws
                8 nW of total system standby power and uses only
                22.6 pJ/bit/chip for communication. This is the
                lowest power for any system bus with MBus's
                feature set.},
      URL = {http://terraswarm.org/pubs/330.html}
  }
  

Posted by Barb Hoversten on 30 Jun 2014.