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References


[Bha93a] S. S. Bhattacharyya and E. A. Lee, "Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms," Formal Methods in System Design, No. 5, No. 3, December 1994 (Updated from Technical Report UCB/ERL M93/37, EECS Dept., UC Berkeley, May 21, 1993).

[Bha93b] S. S. Bhattacharyya, J. T. Buck, S. Ha, and E. A. Lee, "A Scheduling Framework for Minimizing Memory Requirements of Multirate DSP Systems Represented as Dataflow Graphs," VLSI Signal Processing VI, ed. by L. Eggermont, P. Dewilde, E. Deprettre, and J. van Meerbergen, pp. 188-196, IEEE Special Publications, New York, NY, 1993.

[Bha93c] S. S. Bhattacharyya, J. Buck, S. Ha, and E. A. Lee, "Generating Compact Code from Dataflow Specifications of Multirate Signal Processing Algorithms," IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 42, no. 3, pp. 138-150, March 1995 (Updated from Technical Report M93/36, EECS Dept., UC Berkeley, May 21, 1993).

[Bha94a] S. S. Bhattacharyya and E. A. Lee, "Scheduling Synchronous Dataflow Graphs for Efficient Looping," J. of VLSI Signal Processing, vol. 6, December 1993.

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[Wol91] S. Wolfram, Mathematica: A System for Doing Mathematics by Computer, Addison-Wesley, ISBN 0-201-51502-4, 1991.



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