MEMORY MANAGEMENT FOR DATAFLOW PROGRAMMING OF MULTIRATE SIGNAL PROCESSING ALGORITHMS 1

Shuvra S. Bhattacharyya and Edward A. Lee

IEEE Transactions on Signal Processing, Vol. 42, No. 5
May, 1994

Prepublished version
Published version

ABSTRACT

Managing the buffering of data along arcs is a critical part of compiling a synchronous dataflow (SDF) program. This paper shows how dataflow properties can be analyzed at compile-time to make buffering more efficient. Since the target code corresponding to each node of an SDF graph is normally obtained from a hand-optimized library of predefined blocks, the efficiency of data transfer between blocks is often the limiting factor in how closely an SDF compiler can approximate meticulous manual coding. Furthermore, in the presence of large sample-rate changes, straightforward buffering techniques can quickly exhaust limited on-chip data memory, necessitating the use of slower external memory. The techniques presented in this paper address both of these problems in a unified manner.

1This research was sponsored by Defense Advanced Research Projects Agency (monitored by the U. S. Department of Justice, Federal Bureau of Investigation, under contract no. J-FBI-90-073), and by the National Science Foundation (MIP-9201605).