A Hierarchical Multiprocessor Scheduling System for DSP Applications

José Luis Pino, Shuvra S. Bhattacharyya and Edward A. Lee

Proceedings of the IEEE Asilomar Conference on Signals, Systems and Computers Pacific Grove, CA
October 29 - November 1, 1995

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This paper discusses a hierarchical scheduling framework which reduces the compl exity of scheduling synchronous dataflow (SDF) graphs onto multiple processors. The core of this framework is a clustering algorithm that decreases the number o f nodes before expanding the SDF graph into a precedence directed acyclic graph (DAG). The internals of the clusters are then scheduled with uniprocessor SDF schedulers which can optimize for memory usage. The clustering is done in such a manner as to leave ample parallelism exposed for the multiprocessor scheduler. We have developed the SDF composition theorem for testing if a clustering step is valid. The advantages of this framework are demonstrated with several practical, real-time examples.