Real-time Signal Processing on the Ultrasparc

by William Chen

Technical Memorandum UCB/ERL M97/4
Electronics Research Laboratory, Berkeley, CA 94720 January 17, 1997

[Postscript] [PDF]


With the convergence of audio, video, and the Internet, multimedia applications increasingly demand real-time processing from general purpose CPUs. Traditionally, computer architects have increased the performance of CPUs in incremental steps, increasing the number of cache levels, increasing the complexity of I/O controllers, increasing the length of the pipeline, increasing the number of instructions issued per cycle, and reducing the overall chip size. But the constraint of real-time processing is a hard problem, and computer architects must take a different approach to keep up. One approach is to support the signal processing functions that are common to these applications by introducing native signal processing (NSP) instructions into the microprocessor. In this report, I describe the architectural features of the UltraSparc processor and the signal processing func tionality of the Visual Instruction Set (VIS). I also measure the performance of a number of real- time applications and signal processing kernels that use the Visual Instruction Set and discuss the implementation of the VIS code generation domain within the Ptolemy environment.
Send comments to Edward A. Lee at eal at eecs berkeley edu .