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Citation
Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar. "Static Power Reduction Techniques for Asynchronous Circuits". IEEE International Symposium on Asynchronous Circuits and Systems, May, 2010.

Abstract
Power gating techniques are effective in mitigating leakage losses, which represent a significant portion of power consumption in nanoscale circuits. We examine variants of two representative techniques, Cut-Off and Zig-Zag Cut-Off, and find that they offer an average of 80% and 20% in power savings, respectively, for asynchronous circuit families. We also present a new zero-delay (ZDRTO) wakeup technique for power gated asynchronous pipelines, which leverages the robustness of asynchronous circuits to delays and supply voltage variations. Our ZDRTO technique offers a tradeoff between wakeup time and static power reduction, making it suitable for power gating pipelines with low-duty cycle, bursty usage patterns.

Electronic downloads

• http://vlsi.cornell.edu/ulp.php

• HTML

  Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar.
  <a href="http://www.truststc.org/pubs/672.html"
  >Static Power Reduction Techniques for Asynchronous
  Circuits</a>, IEEE International Symposium on
  Asynchronous Circuits and Systems, May, 2010.

• Plain text

  Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar.
  "Static Power Reduction Techniques for Asynchronous
  Circuits". IEEE International Symposium on Asynchronous
  Circuits and Systems, May, 2010.

• BibTeX

  @inproceedings{OrtegaOteroTseManohar10_StaticPowerReductionTechniquesForAsynchronousCircuits,
      author = {Carlos Tadeo Ortega Otero and Jonathan Tse and
                Rajit Manohar},
      title = {Static Power Reduction Techniques for Asynchronous
                Circuits},
      booktitle = {IEEE International Symposium on Asynchronous
                Circuits and Systems},
      month = {May},
      year = {2010},
      abstract = {Power gating techniques are effective in
                mitigating leakage losses, which represent a
                significant portion of power consumption in
                nanoscale circuits. We examine variants of two
                representative techniques, Cut-Off and Zig-Zag
                Cut-Off, and find that they offer an average of
                80% and 20% in power savings, respectively, for
                asynchronous circuit families. We also present a
                new zero-delay (ZDRTO) wakeup technique for power
                gated asynchronous pipelines, which leverages the
                robustness of asynchronous circuits to delays and
                supply voltage variations. Our ZDRTO technique
                offers a tradeoff between wakeup time and static
                power reduction, making it suitable for power
                gating pipelines with low-duty cycle, bursty usage
                patterns. },
      URL = {http://www.truststc.org/pubs/672.html}
  }
  

Posted by Rajit Manohar on 29 Mar 2010.
Groups: trust
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