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4.14 Code generation in VHDL (VHDL, VHDLB)

This pair of domains is for generating code in VHDL (VHSIC Hardware Description Language). The VHDL domain supports functional models using the SDF model of computation, while VHDLB supports behavioral models using the native VHDL discrete event model of computation. Since the VHDL domain is based on the SDF model, it is independent of any notion of time. The VHDLB domain supports time delays and time-dependent behavior of blocks. The VHDL domain is intended for modeling systems at the functional block level, as in DSP functions for filtering and transforms, or in digital logic functions, independent of implementation issues. The VHDLB domain is intended for modeling the behavior of components and their interactions in system designs at all levels of abstraction.

Within the VHDL domain there are a number of different Targets to choose from. The default target, default-VHDL, generates sequential VHDL code in a single process within a single entity, following the execution order from the SDF scheduler. This code is suitable for efficient simulation, since it does not generate events on signals. The SimVSS-VHDL target is derived from default-VHDL and it provides facilities for simulation using the Synopsys VSS VHDL simulator. Communication actors and facilities in the SimVSS-VHDL target support code synthesis and co-simulation of heterogeneous CG systems under the CompileCGSubsystems target developed by José Luis Pino. There is also a SimMT-VHDL target for use with the Model Technology VHDL simulator. The struct-VHDL target generates VHDL code where individual actor firings are encapsulated in separate entities connected by VHDL signals. This target generates code which is intended for circuit synthesis. The Synth-VHDL target, derived from struct-VHDL, provides facilities for synthesizing circuit representations from the structural code using the Synopsys Design Analyzer toolset. Because the VHDL domain uses SDF semantics, it supports retargeting from other domains with SDF semantics (SDF, CGC, etc.) provided that the stars in the original graph are available in the VHDL domain. As this experimental domain evolves, more options for VHDL code generation from dataflow graphs will be provided. These options will include varying degrees of user control and automation depending on the target and the optimization goals of the code generation, particularly in VHDL circuit synthesis.

Unlike the VHDL domain, the older and less-developed VHDLB domain is much simpler in its operation. When a universe in the VHDLB domain is run, the graph is traversed and a codefile is generated in a pop-up window and in a subdirectory which reflects the topology and hierarchy of the graph. The generated VHDL code will reference VHDL entities which are expected to be included in other files. There is a VHDL codefile in the $PTOLEMY/src/domains/vhdlb/lib directory for each VHDL star in the main star palettes of the $PTOLEMY/src/domains/vhdlb/icons directory. Adding a new star is a matter of writing VHDL code for the entity and adding a star file in the stars subdirectory of the VHDLB domain which reflects the inputs, outputs, and parameters of that star. The existing stars should serve as examples for how new stars can be written.

Table 4-1 below summarizes the various domains
Domain Description
Synchronous Data Flow (SDF) · Oldest and most mature domain; it is a sub-domain of DDF, BDF, and PN.

· Special case of data flow model of computation developed by Dennis.

· Flow is completely predictable at compile time thus allows for efficient scheduling.

· Allows for static scheduling.

· Good match for synchronous signal processing systems with sample rates that are rational multiples of one another.

· Supports multi-rate applications and has a rich star library.

· Range of applications is limited.

Dynamic Data Flow (DDF) · Versatile model of computation as it supports conditionals, data-dependent iteration, and true recursion.

· More general than SDF.

· Uses dynamic (run-time) scheduling which is more expensive than static scheduling.

· Good match for signal processing applications with a limited amount of run-time control.

Boolean Data Flow (BDF) · Relatively new domain which supports run-time flow of control.

· Attempts to construct a compile-time schedule to try and achieve efficiency of SDF with generality of DDF.

· More limited than DDF.

· Constructs an annotated schedule: execution of a task is annotated with a boolean condition.

Integer and State Controlled Data Flow (STDF) · Very new to Ptolemy and still experimental.

· Realizes data flow control by integer control data and port statuses. It is an extension to BDF.

· Scheduling is static and conditional like BDF.

· It has user-defined evaluation functions.

Discrete Event (DE) · Relatively mature domain which uses an event-driven model of computation.

· Particles carry time-stamps which represent events that occur at arbitrary points in simulated time.

· Events are processed in chronological order.

Finite State Machine (FSM) · Very new to Ptolemy and still experimental.

· Good match for control-oriented systems like real-time process controllers.

· Uses a directed node-and-arc graph called a state transition diagram (STD) to describe the FSM.

Higher Order Functions (HOF) · Implements behavior of functions that may take a function as an argument and return a function.

· HOF collection of stars may be used in all other domains.

· Intended to be included only as a sub-domain by other domains.

Process Network (PN) · Relatively new domain that implements Kahn process networks which is a generalization of data flow - processes replace actors.

· Implements concurrent processes but without a model of time.

· Uses POSIX threads.

· SDF, BDF, and DDF are sub-domains of PN.

Multidimensional Synchronous Data Flow (MDSDF) · Relatively new and experimental.

· Extends SDF to multidimensional streams.

· Provides ability to express a greater variety of dataflow schedules in a graphically compact way.

· Currently only implements a two-dimensional stream.

Synchronous/Reactive (SR) · Very new to Ptolemy and still experimental.

· Implements model of computation based on model of time used in Esterel.

· Good match for specifying discrete reactive controllers.

Code Generation (CG) · Base domain from which all code generation domains are derived.

· Supports a dataflow model that is equivalent to BDF and SDF semantics.

· This domain only generates comments, allows viewing of the generated comments, and displays a Gantt Chart for parallel schedules.

· Can only support scalar data types on the input and output ports.

· All derived domains obey SDF semantics.

· Useful for testing and debugging schedulers.

· Targets include bdf-CGC which supports BDF, default-CGC which supports SDF semantics, TclTk_Target which supports SDF and must be used when Tcl/Tk stars are present, and unixMulti_C which supports SDF semantics and partitions the graph for multiple workstations on a network.

Code Generation in C (CGC) · Uses data flow semantics and generates C code.

· Generated C code is statically scheduled and memory used to buffer data between stars is statically allocated.

Code Generation for the Motorola DSP 56000 (CG56) · Synthesizes assembly code for the Motorola DSP56000 family.

Code Generation in VHDL (VHDL, VHDLB) · Relatively new and experimental

· Generates VHDL code.

· VHDL domain supports SDF semantics whereas VHDLB supports behavioral models using native VHDL discrete event model of computation.

· Many targets to choose from.

· VHDL domain is good for modeling systems at functional block level whereas VHDLB is good for modeling behavior of components and their interactions at all levels of abstraction.

The table below summarizes the various schedulers

Table 4-3 below summarizes the multiprocessor schedulers.

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