EECS20N: Signals and Systems

Feedback Example 1

In this example, in either state, the output can be determined without knowing the input. The output is said to be state determined. Thus, the output of this state machine is the sequence

false, true, false, true, false, ...

Notice that the component machine here behaves like an inverter with delay. The output is always opposite of the previous input, except the first time, where the output is false. Connecting such a delay in this feedback arrangement results in an oscillating output.